BibTeX record conf/vlsic/LinHTTHCHHCGFRL19

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@inproceedings{DBLP:conf/vlsic/LinHTTHCHHCGFRL19,
  author       = {Mu{-}Shan Lin and
                  Tze{-}Chiang Huang and
                  Chien{-}Chun Tsai and
                  King{-}Ho Tam and
                  Kenny Cheng{-}Hsiang Hsieh and
                  Tom Chen and
                  Wen{-}Hung Huang and
                  Jack Hu and
                  Yu{-}Chi Chen and
                  Sandeep Kumar Goel and
                  Chin{-}Ming Fu and
                  Stefan Rusu and
                  Chao{-}Chieh Li and
                  Sheng{-}Yao Yang and
                  Mei Wong and
                  Shu{-}Chun Yang and
                  Frank Lee},
  title        = {A 7nm 4GHz Arm\({}^{\mbox{{\textregistered}}}\)-core-based CoWoS\({}^{\mbox{{\textregistered}}}\)
                  Chiplet Design for High Performance Computing},
  booktitle    = {2019 Symposium on {VLSI} Circuits, Kyoto, Japan, June 9-14, 2019},
  pages        = {28},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.23919/VLSIC.2019.8778161},
  doi          = {10.23919/VLSIC.2019.8778161},
  timestamp    = {Thu, 02 Apr 2020 09:00:12 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsic/LinHTTHCHHCGFRL19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}