BibTeX record journals/integration/KapadiaP12

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@article{DBLP:journals/integration/KapadiaP12,
  author       = {Nishit Ashok Kapadia and
                  Sudeep Pasricha},
  title        = {A framework for low power synthesis of interconnection networks-on-chip
                  with multiple voltage islands},
  journal      = {Integr.},
  volume       = {45},
  number       = {3},
  pages        = {271--281},
  year         = {2012},
  url          = {https://doi.org/10.1016/j.vlsi.2011.11.010},
  doi          = {10.1016/J.VLSI.2011.11.010},
  timestamp    = {Thu, 20 Feb 2020 13:21:27 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/KapadiaP12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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