BibTeX record journals/jssc/RusuTMACCSBVLLV07

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@article{DBLP:journals/jssc/RusuTMACCSBVLLV07,
  author       = {Stefan Rusu and
                  Simon M. Tam and
                  Harry Muljono and
                  David Ayers and
                  Jonathan Chang and
                  Brian S. Cherkauer and
                  Jason Stinson and
                  John Benoit and
                  Raj Varada and
                  Justin Leung and
                  Rahul Dilip Limaye and
                  Sujal Vora},
  title        = {A 65-nm Dual-Core Multithreaded Xeon{\textregistered} Processor With
                  16-MB {L3} Cache},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {42},
  number       = {1},
  pages        = {17--25},
  year         = {2007},
  url          = {https://doi.org/10.1109/JSSC.2006.885041},
  doi          = {10.1109/JSSC.2006.885041},
  timestamp    = {Sun, 30 Aug 2020 00:14:03 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/RusuTMACCSBVLLV07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}