BibTeX record journals/tcad/MishraS17

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@article{DBLP:journals/tcad/MishraS17,
  author    = {Vivek Mishra and
               Sachin S. Sapatnekar},
  title     = {Probabilistic Wire Resistance Degradation Due to Electromigration
               in Power Grids},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {36},
  number    = {4},
  pages     = {628--640},
  year      = {2017},
  url       = {https://doi.org/10.1109/TCAD.2016.2584054},
  doi       = {10.1109/TCAD.2016.2584054},
  timestamp = {Fri, 02 Nov 2018 09:33:00 +0100},
  biburl    = {https://dblp.org/rec/bib/journals/tcad/MishraS17},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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