BibTeX record journals/tvlsi/LeeCAC17

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@article{DBLP:journals/tvlsi/LeeCAC17,
  author       = {Jinho Lee and
                  Jongwook Chung and
                  Jung Ho Ahn and
                  Kiyoung Choi},
  title        = {Excavating the Hidden Parallelism Inside {DRAM} Architectures With
                  Buffered Compares},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {25},
  number       = {6},
  pages        = {1793--1806},
  year         = {2017},
  url          = {https://doi.org/10.1109/TVLSI.2017.2655722},
  doi          = {10.1109/TVLSI.2017.2655722},
  timestamp    = {Tue, 21 Mar 2023 21:13:47 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/LeeCAC17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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