BibTeX record journals/vlsi/MirzaeeNB14

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@article{DBLP:journals/vlsi/MirzaeeNB14,
  author       = {Reza Faghih Mirzaee and
                  Keivan Navi and
                  Nader Bagherzadeh},
  title        = {High-Efficient Circuits for Ternary Addition},
  journal      = {{VLSI} Design},
  volume       = {2014},
  pages        = {534587:1--534587:15},
  year         = {2014},
  url          = {https://doi.org/10.1155/2014/534587},
  doi          = {10.1155/2014/534587},
  timestamp    = {Mon, 15 Jun 2020 16:57:18 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsi/MirzaeeNB14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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