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"Circuit Topology-Based Test Pattern Generation for Small-Delay Defects."
Sandeep Kumar Goel, Krishnendu Chakrabarty (2014)
- Sandeep Kumar Goel, Krishnendu Chakrabarty:

Circuit Topology-Based Test Pattern Generation for Small-Delay Defects. Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits 2014: 161-184

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