"Impact of Leakage Power Reduction Techniques on Parametric Yield - ..."

Sudip Roy, Ajit Pal (2013)

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Sudip Roy, Ajit Pal:
Impact of Leakage Power Reduction Techniques on Parametric Yield - Low-Power Design of Digital Integrated Circuits under Process Parameter Variations. LAP Lambert Academic Publishing 2013, ISBN 978-3-659-27391-9, pp. I-XVII, 1-131

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