"An Innovative Write Circuitry for Enhancing a 3nm L1 Cache Performance ..."

Sandipan Sinha et al. (2023)

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DOI: 10.1109/APCCAS60141.2023.00090

access: closed

type: Conference or Workshop Paper

metadata version: 2024-05-10

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Sandipan Sinha, Manish Trivedi, Jaswinder Singh, Sriharsha Enjapuri, Deepesh Gujjar, Ramesh Halli, Girishankar Gurumurthy:
An Innovative Write Circuitry for Enhancing a 3nm L1 Cache Performance Across Wide DVFS Range. APCCAS 2023: 375-377

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