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"An FPGA Implementation of a Fully Verified Double Precision IEEE ..."

Nikhil Kikkeri, Peter-Michael Seidel (2007)

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DOI: 10.1109/ASAP.2007.4429962

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  persistent URL:
  - https://dblp.org/rec/conf/asap/KikkeriS07
Nikhil Kikkeri, Peter-Michael Seidel:
An FPGA Implementation of a Fully Verified Double Precision IEEE Floating-Point Adder. ASAP 2007: 83-88

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