"Variation-aware subthreshold logic circuit design."

Hiroshi Fuketa et al. (2013)

> Home

Details and statistics

DOI: 10.1109/ASICON.2013.6811842

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-25

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/asicon/FuketaTTNSS13
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/asicon/FuketaTTNSS13
Hiroshi Fuketa, Ryo Takahashi, Makoto Takamiya, Masahiro Nomura, Hirofumi Shinohara, Takayasu Sakurai:
Variation-aware subthreshold logic circuit design. ASICON 2013: 1-4

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.