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"Design and measurement of 6.4 Gbps 8: 1 multiplexer in 0.18µm CMOS ..."

Akinori Shinmyo, Masanori Hashimoto, Hidetoshi Onodera (2005)

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DOI: 10.1145/1120725.1120890

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  dblp key:
  - conf/aspdac/ShinmyoHO05
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  - https://dblp.org/rec/conf/aspdac/ShinmyoHO05
Akinori Shinmyo, Masanori Hashimoto, Hidetoshi Onodera:
Design and measurement of 6.4 Gbps 8: 1 multiplexer in 0.18µm CMOS process. ASP-DAC 2005: 9-10

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