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"Power and slew-aware clock network design for through-silicon-via (TSV) ..."

Xin Zhao, Sung Kyu Lim (2010)

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DOI: 10.1109/ASPDAC.2010.5419900

access: closed

type: Conference or Workshop Paper

metadata version: 2022-10-02

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  persistent URL:
  - https://dblp.org/rec/conf/aspdac/ZhaoL10
Xin Zhao, Sung Kyu Lim:
Power and slew-aware clock network design for through-silicon-via (TSV) based 3D ICs. ASP-DAC 2010: 175-180

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