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"Application of a Design for Delay Testability Approach to High Speed Logic ..."

Kazumi Hatayama et al. (1997)

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DOI: 10.1109/ATS.1997.643944

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
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  - https://dblp.org/rec/conf/ats/HatayamaITUS97
Kazumi Hatayama, Mitsuji Ikeda, Masahiro Takakura, Satoshi Uchiyama, Yoriyuki Sakamoto:
Application of a Design for Delay Testability Approach to High Speed Logic LSIs. Asian Test Symposium 1997: 112-115

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