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"An Array Processor Architecture with Parallel Data Cache for Image ..."

Mladen Berekovic, Peter Pirsch (1998)

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DOI: 10.1109/CGI.1998.694294

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-30

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  - https://dblp.org/rec/conf/cgi/BerekovicP98
Mladen Berekovic, Peter Pirsch:
An Array Processor Architecture with Parallel Data Cache for Image Rendering and Compositing. Computer Graphics International 1998: 411-

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