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"Low-power technique for on-chip memory using biased partitioning and ..."

Naoyuki Kawabe, Kimiyoshi Usami (2000)

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DOI: 10.1109/CICC.2000.852665

access: closed

type: Conference or Workshop Paper

metadata version: 2022-10-10

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Naoyuki Kawabe, Kimiyoshi Usami:
Low-power technique for on-chip memory using biased partitioning and access concentration. CICC 2000: 275-278

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