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"A 1.8-V 22-mW 10-bit 30-MS/s Subsampling Pipelined CMOS ADC."

Jian Li et al. (2006)

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DOI: 10.1109/CICC.2006.320895

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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  - conf/cicc/LiZXCZG06
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Jian Li, Xiaoyang Zeng, Lei Xie, Jun Chen, Jianyun Zhang, Yawei Guo:
A 1.8-V 22-mW 10-bit 30-MS/s Subsampling Pipelined CMOS ADC. CICC 2006: 513-516

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