"Implementation of Low Power 8-Bit Multiplier Using Gate Diffusion Input Logic."

B. N. Manjunatha Reddy et al. (2014)

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DOI: 10.1109/CSE.2014.342

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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B. N. Manjunatha Reddy, H. N. Sheshagiri, B. R. Vijayakumar, Shanthala S:
Implementation of Low Power 8-Bit Multiplier Using Gate Diffusion Input Logic. CSE 2014: 1868-1871

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