BibTeX record conf/dac/ThieleAE15

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@inproceedings{DBLP:conf/dac/ThieleAE15,
  author    = {Daniel Thiele and
               Philip Axer and
               Rolf Ernst},
  title     = {Improving formal timing analysis of switched ethernet by exploiting
               {FIFO} scheduling},
  booktitle = {Proceedings of the 52nd Annual Design Automation Conference, San Francisco,
               CA, USA, June 7-11, 2015},
  pages     = {41:1--41:6},
  publisher = {{ACM}},
  year      = {2015},
  url       = {https://doi.org/10.1145/2744769.2744854},
  doi       = {10.1145/2744769.2744854},
  timestamp = {Tue, 06 Nov 2018 16:58:18 +0100},
  biburl    = {https://dblp.org/rec/conf/dac/ThieleAE15.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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