BibTeX record conf/dac/TsengLYJTLS16

download as .bib file

@inproceedings{DBLP:conf/dac/TsengLYJTLS16,
  author    = {Tsun{-}Ming Tseng and
               Bing Li and
               Ching{-}Feng Yeh and
               Hsiang{-}Chieh Jhan and
               Zuo{-}Min Tsai and
               Mark Po{-}Hung Lin and
               Ulf Schlichtmann},
  title     = {Novel {CMOS} {RFIC} layout generation with concurrent device placement
               and fixed-length microstrip routing},
  booktitle = {Proceedings of the 53rd Annual Design Automation Conference, {DAC}
               2016, Austin, TX, USA, June 5-9, 2016},
  pages     = {101:1--101:6},
  publisher = {{ACM}},
  year      = {2016},
  url       = {https://doi.org/10.1145/2897937.2898052},
  doi       = {10.1145/2897937.2898052},
  timestamp = {Mon, 16 Sep 2019 15:30:02 +0200},
  biburl    = {https://dblp.org/rec/conf/dac/TsengLYJTLS16.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics