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"Vertically-stacked double-gate nanowire FETs with controllable polarity: ..."

Pierre-Emmanuel Gaillardon et al. (2013)

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DOI: 10.7873/DATE.2013.137

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-23

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  dblp key:
  - conf/date/GaillardonABMSLM13
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  persistent URL:
  - https://dblp.org/rec/conf/date/GaillardonABMSLM13
Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Shashikanth Bobba, Michele De Marchi, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli:
Vertically-stacked double-gate nanowire FETs with controllable polarity: from devices to regular ASICs. DATE 2013: 625-630

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