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"Yield-Reliability Modeling for Fault Tolerant Integrated Circuits."

Thomas S. Barnett, Adit D. Singh, Victor P. Nelson (2001)

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DOI: 10.1109/DFTVS.2001.966749

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/dft/BarnettSN01
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  persistent URL:
  - https://dblp.org/rec/conf/dft/BarnettSN01
Thomas S. Barnett, Adit D. Singh, Victor P. Nelson:
Yield-Reliability Modeling for Fault Tolerant Integrated Circuits. DFT 2001: 29-38

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