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"Neural Network for Circuit Models of Monolithic InAlN/GaN NAND and NOR ..."

Ales Chvála et al. (2019)

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DOI: 10.1109/DTIS.2019.8735087

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-30

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  - conf/dtis/ChvalaNMPDS19
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Ales Chvála, Lukás Nagy, Juraj Marek, Juraj Priesol, Daniel Donoval, Alexander Satka:
Neural Network for Circuit Models of Monolithic InAlN/GaN NAND and NOR Logic Gates. DTIS 2019: 1-4

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