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"A 230mV-950mV 2.8Tbps/W Unified SHA256/SM3 Secure Hashing Hardware ..."

Vikram B. Suresh et al. (2018)

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DOI: 10.1109/ESSCIRC.2018.8494257

access: closed

type: Conference or Workshop Paper

metadata version: 2022-02-25

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  - conf/esscirc/SureshSMAKAHK18
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Vikram B. Suresh, Sudhir Satpathy, Sanu Mathew, Mark A. Anders, Himanshu Kaul, Amit Agarwal, Steven Hsu, Ram Krishnamurthy:
A 230mV-950mV 2.8Tbps/W Unified SHA256/SM3 Secure Hashing Hardware Accelerator in 14nm Tri-Gate CMOS. ESSCIRC 2018: 98-101

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