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ORCID"Exploiting the Use of VHDL Specifications in the AGENDA High-Level ..."
George Economakos, George K. Papakonstantinou (1998)
- George Economakos, George K. Papakonstantinou:
Exploiting the Use of VHDL Specifications in the AGENDA High-Level Synthesis Environment. EUROMICRO 1998: 10091-10098
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