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"Reduction of Latency and Resource Usage in Bit-Level Pipelined Data Paths ..."

Peter Kollig, Bashir M. Al-Hashimi (1999)

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DOI: 10.1145/296399.296466

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  - conf/fpga/KolligA99
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Peter Kollig, Bashir M. Al-Hashimi:
Reduction of Latency and Resource Usage in Bit-Level Pipelined Data Paths for FPGAs. FPGA 1999: 227-234

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