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"Low-voltage limitations of deep-sub-100-nm CMOS LSIs: view of memory ..."

Kiyoo Itoh, Masanao Yamaoka, Takayuki Kawahara (2007)

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DOI: 10.1145/1228784.1228789

access: closed

type: Conference or Workshop Paper

metadata version: 2022-07-07

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  - conf/glvlsi/ItohYK07
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Kiyoo Itoh, Masanao Yamaoka, Takayuki Kawahara:
Low-voltage limitations of deep-sub-100-nm CMOS LSIs: view of memory designers. ACM Great Lakes Symposium on VLSI 2007: 529-533

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