"A novel high performance low power CMOS NOR gate using Voltage Scaling and ..."

Ankish Handa, Jitesh Chawla, Geetanjali Sharma (2014)

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DOI: 10.1109/ICACCI.2014.6968238

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-24

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Ankish Handa, Jitesh Chawla, Geetanjali Sharma:
A novel high performance low power CMOS NOR gate using Voltage Scaling and MTCMOS technique. ICACCI 2014: 624-629

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