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"VERILAT: verification using logic augmentation and transformations."

Dhiraj K. Pradhan, Debjyoti Paul, Mitrajit Chatterjee (1996)

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DOI: 10.1109/ICCAD.1996.569111

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/iccad/PradhanPC96
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  persistent URL:
  - https://dblp.org/rec/conf/iccad/PradhanPC96
Dhiraj K. Pradhan, Debjyoti Paul, Mitrajit Chatterjee:
VERILAT: verification using logic augmentation and transformations. ICCAD 1996: 88-95

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