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"A 240mV 1MHz, 340mV 10MHz, 40nm CMOS, 252 bits frame decoder using ..."

Sylvain Clerc et al. (2011)

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DOI: 10.1109/ICECS.2011.6122228

access: closed

type: Conference or Workshop Paper

metadata version: 2023-06-15

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Sylvain Clerc, Fady Abouzeid, Fabrice Argoud, Abhay Kumar, Rajesh Kumar, Philippe Roche:
A 240mV 1MHz, 340mV 10MHz, 40nm CMOS, 252 bits frame decoder using ultra-low voltage circuit design platform. ICECS 2011: 117-120

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