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"Register grouping for synthesis of clock gating logic."

Inhak Han et al. (2016)

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DOI: 10.1109/ICICDT.2016.7542070

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

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  dblp key:
  - conf/icicdt/HanKYS16
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  - https://dblp.org/rec/conf/icicdt/HanKYS16
Inhak Han, Jonggyu Kim, Joonhwan Yi, Youngsoo Shin:
Register grouping for synthesis of clock gating logic. ICICDT 2016: 1-4

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