"On a New Class of Optimal Parallel Prefix Circuits with (Size+Depth) = ..."

Sudarshan K. Dhall, S. Lakshmivarahan, Chi-Ming Yang (1987)

> Home

Details and statistics

DOI: —

access: unavailable

type: Conference or Workshop Paper

metadata version: 2014-07-28

- no documents available
- export record
  dblp key:
  - conf/icpp/DhallLY87
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/icpp/DhallLY87
Sudarshan K. Dhall, S. Lakshmivarahan, Chi-Ming Yang:
On a New Class of Optimal Parallel Prefix Circuits with (Size+Depth) = 2n-2 AND\lceil log n \rceil DEPTH(2 \lceil log n \rceil -3). ICPP 1987: 58-65

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.