Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Evaluating architecture and compiler design through static loop analysis."

Yuriy Kashnikov et al. (2013)

> Home

Details and statistics

DOI: 10.1109/HPCSIM.2013.6641465

access: closed

type: Conference or Workshop Paper

metadata version: 2022-04-09

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/ieeehpcs/KashnikovCOJ13
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/ieeehpcs/KashnikovCOJ13
Yuriy Kashnikov, Pablo de Oliveira Castro, Emmanuel Oseret, William Jalby:
Evaluating architecture and compiler design through static loop analysis. HPCS 2013: 535-544

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.