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"An ultra-low voltage hearing aid chip using variable-latency design technique."

Kuo-Chiang Chang et al. (2014)

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DOI: 10.1109/ISCAS.2014.6865691

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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  dblp key:
  - conf/iscas/ChangLHLCJ14
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  - https://dblp.org/rec/conf/iscas/ChangLHLCJ14
Kuo-Chiang Chang, Shien-Chun Luo, Ching-Ji Huang, Chih-Wei Liu, Yuan-Hua Chu, Shyh-Jye Jou:
An ultra-low voltage hearing aid chip using variable-latency design technique. ISCAS 2014: 2543-2546

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