"VLSI architecture of extended in-place path metric update for Viterbi ..."

Chien-Ming Wu et al. (2001)

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DOI: 10.1109/ISCAS.2001.922208

access: closed

type: Conference or Workshop Paper

metadata version: 2018-08-16

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Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu, Ming-Hwa Sheu:
VLSI architecture of extended in-place path metric update for Viterbi decoders. ISCAS (4) 2001: 206-209

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