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"A VLSI architecture of fast high-radix modular multiplication for RSA ..."

Che-Han Wu et al. (1999)

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DOI: 10.1109/ISCAS.1999.777938

access: closed

type: Conference or Workshop Paper

metadata version: 2018-08-16

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Che-Han Wu, Ming-Der Shieh, Chien-Hsing Wu, Ming-Hwa Sheu, Jia-Lin Sheu:
A VLSI architecture of fast high-radix modular multiplication for RSA cryptosystem. ISCAS (1) 1999: 500-503

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