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ORCID"Slope interconnect effort: gate-interconnect interdependentdelay model for ..."
Myeong-Eun Hwang, Seong-Ook Jung, Kaushik Roy (2007)
- Myeong-Eun Hwang, Seong-Ook Jung, Kaushik Roy:
Slope interconnect effort: gate-interconnect interdependentdelay model for CMOS logic gates. ISLPED 2007: 387-390
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