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"Full-chip sub-threshold leakage power prediction model for sub-0.18 ..."

Siva G. Narendra et al. (2002)

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DOI: 10.1145/566408.566415

access: closed

type: Conference or Workshop Paper

metadata version: 2022-02-28

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  - conf/islped/NarendraDBAC02
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Siva G. Narendra, Vivek De, Shekhar Borkar, Dimitri A. Antoniadis, Anantha P. Chandrakasan:
Full-chip sub-threshold leakage power prediction model for sub-0.18 µm CMOS. ISLPED 2002: 19-23

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