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"Integrated floorplanning with buffer/channel insertion for bus-based ..."

Faran Rafiq et al. (2002)

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DOI: 10.1145/505388.505403

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  - conf/ispd/RafiqCYS02
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Faran Rafiq, Malgorzata Chrzanowska-Jeske, Hannah Honghua Yang, Naveed A. Sherwani:
Integrated floorplanning with buffer/channel insertion for bus-based microprocessor designs. ISPD 2002: 56-61

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