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"TILE64 - Processor: A 64-Core SoC with Mesh Interconnect."

Shane Bell et al. (2008)

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DOI: 10.1109/ISSCC.2008.4523070

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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  dblp key:
  - conf/isscc/BellEACJLMRBBMMRWABFKMSZ08
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  persistent URL:
  - https://dblp.org/rec/conf/isscc/BellEACJLMRBBMMRWABFKMSZ08
Shane Bell, Bruce Edwards, John Amann, Rich Conlin, Kevin Joyce, Vince Leung, John MacKay, Mike Reif, Liewei Bao, John F. Brown III, Matthew Mattina, Chyi-Chang Miao, Carl Ramey, David Wentzlaff, Walker Anderson, Ethan Berger, Nat Fairbanks, Durlov Khan, Froilan Montenegro, Jay Stickney, John Zook:
TILE64 - Processor: A 64-Core SoC with Mesh Interconnect. ISSCC 2008: 88-89

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