"A 16b 80MS/s 100mW 77.6dB SNR CMOS pipeline ADC."

Janet Brunsilius et al. (2011)

> Home

Details and statistics

DOI: 10.1109/ISSCC.2011.5746275

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/isscc/BrunsiliusSKMYLBBB11
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isscc/BrunsiliusSKMYLBBB11
Janet Brunsilius, Eric Siragusa, Steve Kosic, Frank Murden, Ege Yetis, Binh Luu, Jeff Bray, Phil Brown, Allen Barlow:
A 16b 80MS/s 100mW 77.6dB SNR CMOS pipeline ADC. ISSCC 2011: 186-188

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.