"An 80nm 4Gb/s/pin 32b 512Mb GDDR4 Graphics DRAM with Low-Power and ..."

Jeong-Don Ihm et al. (2007)

> Home

Details and statistics

DOI: 10.1109/ISSCC.2007.373509

access: closed

type: Conference or Workshop Paper

metadata version: 2025-10-30

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/isscc/IhmBPSLKKLPBLMJHCHKLKPPYCKLKJJC07
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isscc/IhmBPSLKKLPBLMJHCHKLKPPYCKLKJJC07
Jeong-Don Ihm, Seung-Jun Bae, Kwang-Il Park, Ho-Young Song, Woo-Jin Lee, Hyun-Jin Kim, Kyoung-Ho Kim, Ho-Kyung Lee, Min-Sang Park, Sam-Young Bang, Mi-Jin Lee, Gil-Shin Moon, Young-Wook Jang, Suk-Won Hwang, Young-Chul Cho, Sang-Jun Hwang, Dae-Hyun Kim, Ji-Hoon Lim, Jae-Sung Kim, Su-Jin Park, Ok-Joo Park, Se-Mi Yang, Jin-Yong Choi, Young-Wook Kim, Hyun-Kyu Lee, Sunghoon Kim, Seong-Jin Jang, Young-Hyun Jun, Soo-In Cho:
An 80nm 4Gb/s/pin 32b 512Mb GDDR4 Graphics DRAM with Low-Power and Low-Noise Data-Bus Inversion. ISSCC 2007: 492-617

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.