"8.10 A 180-to-240Gb/s Analog-Intensive PAM-4 Transmitter with 0.70pJ/b ..."

Ziyi Lin et al. (2026)

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DOI: 10.1109/ISSCC49663.2026.11408972

access: closed

type: Conference or Workshop Paper

metadata version: 2026-03-26

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Ziyi Lin, Haikun Jia, Wei Deng, Shitu He, Chang Liu, Zhihua Wang, Baoyong Chi:
8.10 A 180-to-240Gb/s Analog-Intensive PAM-4 Transmitter with 0.70pJ/b Analog Power Efficiency in 65nm CMOS. ISSCC 2026: 152-154

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