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"A Modular All-Digital PLL Architecture Enabling Both 1-to-2GHz and ..."

Alexander V. Rylyakov et al. (2008)

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DOI: 10.1109/ISSCC.2008.4523284

access: closed

type: Conference or Workshop Paper

metadata version: 2019-07-10

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Alexander V. Rylyakov, José A. Tierno, Didem Zeliha Turker, Jean-Olivier Plouchart, Herschel A. Ainspan, Daniel J. Friedman:
A Modular All-Digital PLL Architecture Enabling Both 1-to-2GHz and 24-to-32GHz Operation in 65nm CMOS. ISSCC 2008: 516-517

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