"An Analytical Model to Study Optimal Area Breakdown between Cores and ..."

Taecheol Oh et al. (2009)

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DOI: 10.1109/ISVLSI.2009.27

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Taecheol Oh, Hyunjin Lee, Kiyeon Lee, Sangyeun Cho:
An Analytical Model to Study Optimal Area Breakdown between Cores and Caches in a Chip Multiprocessor. ISVLSI 2009: 181-186

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