"An FPGA-Based Reconfigurable Accelerator for Low-Bit DNN Training."

Haikuo Shao et al. (2021)

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DOI: 10.1109/ISVLSI51109.2021.00054

access: closed

type: Conference or Workshop Paper

metadata version: 2024-08-04

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Haikuo Shao, Jinming Lu, Jun Lin, Zhongfeng Wang:
An FPGA-Based Reconfigurable Accelerator for Low-Bit DNN Training. ISVLSI 2021: 254-259

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