"An FPGA Implementation of Two-Input LUT Based Information Bottleneck LDPC ..."

Bo-Yu Tseng et al. (2022)

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DOI: 10.1109/MOCAST54814.2022.9837601

access: closed

type: Conference or Workshop Paper

metadata version: 2024-10-06

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Bo-Yu Tseng, Brian M. Kurkoski, Philipp Mohr, Gerhard Bauch:
An FPGA Implementation of Two-Input LUT Based Information Bottleneck LDPC Decoders. MOCAST 2022: 1-6

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