"A 5-bit 125-MS/s 367-µW ADC in 65-nm CMOS."

Guanzhong Huang, Pingfen Lin (2012)

> Home

Details and statistics

DOI: 10.1109/MWSCAS.2012.6291942

access: closed

type: Conference or Workshop Paper

metadata version: 2020-03-26

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/mwscas/HuangL12
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/mwscas/HuangL12
Guanzhong Huang, Pingfen Lin:
A 5-bit 125-MS/s 367-µW ADC in 65-nm CMOS. MWSCAS 2012: 1-4

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.