"Implementing a Secure Boot System on a 32-Bit RISC-V CPU on FPGA."

Quoc-Dang Tran et al. (2024)

> Home

Details and statistics

DOI: 10.1109/RIVF64335.2024.11009032

access: closed

type: Conference or Workshop Paper

metadata version: 2025-07-04

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/rivf/TranMBPL24
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/rivf/TranMBPL24
Quoc-Dang Tran, Khai-Minh Ma, Trong-Tu Bui, Cong-Kha Pham, Duc-Hung Le:
Implementing a Secure Boot System on a 32-Bit RISC-V CPU on FPGA. RIVF 2024: 141-145

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.