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"Enabling Fast and Highly Effective FPGA Design Process Using the CAPI SNAP ..."

Alexandre Castellane, Bruno Mesnet (2019)

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DOI: 10.1007/978-3-030-34356-9_25

access: closed

type: Conference or Workshop Paper

metadata version: 2019-12-11

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  dblp key:
  - conf/supercomputer/CastellaneM19
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  - https://dblp.org/rec/conf/supercomputer/CastellaneM19
Alexandre Castellane, Bruno Mesnet:
Enabling Fast and Highly Effective FPGA Design Process Using the CAPI SNAP Framework. ISC Workshops 2019: 317-329

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